AMD and Intel jointly published the ACEv1 specification, their AI compute extensions for the x86 architecture, which was integrated into the GCC 17 development branch on September 2, 2026. The specification promises up to 16 times matrix compute density compared to existing AVX10 operations, with support for INT8, FP8, and BF16 numerical formats used for AI inference. Full GCC support is expected with version 17.1, projected between March and April 2027, while no ACEv1-compatible hardware is anticipated before 2028, with AMD hinting these features could appear in its upcoming Zen 7 architecture. ACEv1 is not backward-compatible with Intel’s AMX extensions, indicating a deliberate break from legacy code paths. This cooperation within the x86 Ecosystem Advisory Group, formed in 2024, aims to maintain x86 architecture relevance against dedicated AI accelerators and Arm-based designs.
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