Cerebras sidesteps AI chip supply bottlenecks with 5nm wafer-scale design

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Cerebras Systems bypasses major AI chip supply chain bottlenecks by choosing a wafer-scale architecture. Its WSE-3 and WSE-3T chips, manufactured by TSMC on a 5nm process, integrate 44 GB of SRAM directly on the chip, eliminating the need for HBM memory and advanced packaging. The WSE-3 chip, announced in March 2024, features 900,000 AI cores and approximately 4 trillion transistors on a 46,225 mm² area. The company secured a $25.4 billion backlog as of June 2026, with over $20 billion coming from a multi-year deal with OpenAI, and completed a Nasdaq IPO in May 2026. Key watchpoints include execution on data-center construction, customer concentration around OpenAI, and validation of Cerebras’s claims on inference performance.

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Telemac
Telemachttp://cryptoinfo.ch
Passionné de nouvelles technologies, j’explore l’univers de la blockchain et des cryptomonnaies pour partager l’actualité et les innovations du secteur.

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